1. Field of the Invention
The present invention relates to a test apparatus configured to test a device employing a source synchronous method.
2. Description of the Related Art
Devices such as SDRAM (Synchronous Dynamic Random Access Memory) employ the source synchronous method so as to perform data transmission with another device. With the source synchronous method, a transmission device outputs a source synchronous clock signal SSCLK (which is also referred to as a “data strobe signal DQS”, and which will be referred to simply as the “clock signal SSCLK” hereafter) together with a data signal DQ. A reception device acquires the value of the data signal DQ at a timing that corresponds to each edge of the source synchronous clock SSCLK. Such a method provides stable data transmission even if a high-speed operation clock is employed.